Analisis Kualitas Daya
Standar: IEC 61000-4-30 Class A ComplianceTHD Tegangan (V)
1.45 %
Batas IEEE 519: 5.0%
THD Arus (I)
4.82 %
Batas IEEE 519: 12.0%
Voltage Unbalance
0.82 %
Max: 3.0%
Flicker (Pst)
0.45
Status: Normal
Spektrum Harmonisa (H1 - H15)
Update: Live via FPGA
Phasor Diagram
V_R 0°
V_S -120°
V_T 120°
Log Gangguan Tegangan (Event Log)
| Stempel Waktu (ms) | Jenis Kejadian | Magnitudo (%) | Durasi (ms) | Fasa |
|---|---|---|---|---|
| 2024-05-20 14:22:01.450 | Voltage Sag | 78% | 120 ms | R |
| 2024-05-20 10:05:12.112 | Voltage Swell | 112% | 45 ms | S, T |